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authorArtur Rojek <contact@artur-rojek.eu>2023-05-27 18:44:52 +0200
committerJohn Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>2023-07-05 18:58:14 +0200
commit3ad4dcbc31d1a8860183cb01e507d75f296c661b (patch)
tree265ccf2f5d0e95546ad405fef6ae0cf0db486c31 /arch/sh/drivers
parentsh: dma: Drop incorrect SH_DMAC_BASE1 definition for SH4 (diff)
downloadlinux-3ad4dcbc31d1a8860183cb01e507d75f296c661b.tar.xz
linux-3ad4dcbc31d1a8860183cb01e507d75f296c661b.zip
sh: dma: Correct the number of DMA channels for SH7709
According to the hardware manual [1], the DMAC found in the SH7709 SoC features only 4 channels. While at it, also sort the existing targets. [1] https://www.renesas.com/us/en/document/mah/sh7709s-group-hardware-manual (p. 373) Signed-off-by: Artur Rojek <contact@artur-rojek.eu> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Link: https://lore.kernel.org/r/20230527164452.64797-4-contact@artur-rojek.eu Signed-off-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Diffstat (limited to 'arch/sh/drivers')
-rw-r--r--arch/sh/drivers/dma/Kconfig14
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index 7d54f284ce10..08d937a6d249 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -28,17 +28,19 @@ config SH_DMA_API
config NR_ONCHIP_DMA_CHANNELS
int
depends on SH_DMA
- default "4" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \
- CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091
+ default "4" if CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750 || \
+ CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7751 || \
+ CPU_SUBTYPE_SH7091
default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
CPU_SUBTYPE_SH7760
- default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || \
- CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724
+ default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7724 || \
+ CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
default "6"
help
This allows you to specify the number of channels that the on-chip
- DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
- SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
+ DMAC supports. This will be 4 for SH7709/SH7750/SH7750S/SH7751/SH7091,
+ 8 for SH7750R/SH7751R/SH7760, and 12 for SH7723/SH7724/SH7780/SH7785.
+ Default is 6.
config SH_DMABRG
bool "SH7760 DMABRG support"