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authorPaul Mundt <lethal@linux-sh.org>2012-05-21 10:54:01 +0200
committerPaul Mundt <lethal@linux-sh.org>2012-05-21 10:54:01 +0200
commit63dc02bde6af1e41d28ebc3774c5f094f362e8c3 (patch)
tree7978dcdc298421729ea75be54aa86b22b5751948 /arch/sh/include/asm/irq.h
parentsh: dma: More legacy cpu dma chainsawing. (diff)
downloadlinux-63dc02bde6af1e41d28ebc3774c5f094f362e8c3.tar.xz
linux-63dc02bde6af1e41d28ebc3774c5f094f362e8c3.zip
sh: Kill off machvec IRQ hinting.
Everything is using sparseirq these days, so we have no need to arbitrarily size nr_irqs ahead of time. The legacy IRQ pre-allocation likewise has no meaning for us, so that's killed off too. We now depend on nr_irqs expansion by the generic hardirq layer instead. It's also worth noting that the majority of boards had completely bogus values for their nr_irqs relative to their CPU and configurations, so this ends up correcting behaviour for quite a few platforms. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/asm/irq.h')
-rw-r--r--arch/sh/include/asm/irq.h13
1 files changed, 8 insertions, 5 deletions
diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h
index 2a62017eb275..0e4f532e4737 100644
--- a/arch/sh/include/asm/irq.h
+++ b/arch/sh/include/asm/irq.h
@@ -5,12 +5,15 @@
#include <asm/machvec.h>
/*
- * A sane default based on a reasonable vector table size, platforms are
- * advised to cap this at the hard limit that they're interested in
- * through the machvec.
+ * Only legacy non-sparseirq platforms have to set a reasonably sane
+ * value here. sparseirq platforms allocate their irq_descs on the fly,
+ * so will expand automatically based on the number of registered IRQs.
*/
-#define NR_IRQS 512
-#define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */
+#ifdef CONFIG_SPARSE_IRQ
+# define NR_IRQS 8
+#else
+# define NR_IRQS 512
+#endif
/*
* This is a special IRQ number for indicating that no IRQ has been