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| author | Matt Fleming <matt@console-pimps.org> | 2009-11-17 22:05:31 +0100 |
|---|---|---|
| committer | Matt Fleming <matt@console-pimps.org> | 2010-01-16 15:28:57 +0100 |
| commit | 8eda55142080f0373b1f0268fe6d6807f193e713 (patch) | |
| tree | 6d103af69153dc5bfd78ebe89930cf3c66ec5b2b /arch/sh/include/cpu-sh4 | |
| parent | sh: Generalize SH7786 PCIe support. (diff) | |
| download | linux-8eda55142080f0373b1f0268fe6d6807f193e713.tar.xz linux-8eda55142080f0373b1f0268fe6d6807f193e713.zip | |
sh: New extended page flag to wire/unwire TLB entries
Provide a new extended page flag, _PAGE_WIRED and an SH4 implementation
for wiring TLB entries and use it in the fixmap code path so that we can
wire the fixmap TLB entry.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Diffstat (limited to 'arch/sh/include/cpu-sh4')
| -rw-r--r-- | arch/sh/include/cpu-sh4/cpu/mmu_context.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h index 3ce7ef6c2978..03ea75c5315d 100644 --- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h +++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h @@ -25,6 +25,10 @@ #define MMUCR_TI (1<<2) +#define MMUCR_URB 0x00FC0000 +#define MMUCR_URB_SHIFT 18 +#define MMUCR_URB_NENTRIES 64 + #if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40) #define MMUCR_SE (1 << 4) #else |