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authorDan Williams <dan.j.williams@intel.com>2009-09-09 02:55:21 +0200
committerDan Williams <dan.j.williams@intel.com>2009-09-09 02:55:21 +0200
commitbbb20089a3275a19e475dbc21320c3742e3ca423 (patch)
tree216fdc1cbef450ca688135c5b8969169482d9a48 /arch/sh/kernel/cpu/init.c
parentMerge branch 'iop-raid6' into async-tx-next (diff)
parentdmaengine: Move all map_sg/unmap_sg for slave channel to its client (diff)
downloadlinux-bbb20089a3275a19e475dbc21320c3742e3ca423.tar.xz
linux-bbb20089a3275a19e475dbc21320c3742e3ca423.zip
Merge branch 'dmaengine' into async-tx-next
Conflicts: crypto/async_tx/async_xor.c drivers/dma/ioat/dma_v2.h drivers/dma/ioat/pci.c drivers/md/raid5.c
Diffstat (limited to 'arch/sh/kernel/cpu/init.c')
-rw-r--r--arch/sh/kernel/cpu/init.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index d29e69c156f0..ad85421099cd 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -62,6 +62,11 @@ static void __init speculative_execution_init(void)
#define speculative_execution_init() do { } while (0)
#endif
+/* 2nd-level cache init */
+void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void)
+{
+}
+
/*
* Generic first-level cache init
*/
@@ -146,6 +151,8 @@ static void __uses_jump_to_uncached cache_init(void)
flags &= ~CCR_CACHE_ENABLE;
#endif
+ l2_cache_init();
+
ctrl_outl(flags, CCR);
back_to_cached();
}