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| author | Anson Huang <b20788@freescale.com> | 2014-09-17 05:11:46 +0200 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2014-11-23 07:56:17 +0100 |
| commit | bc4abc3e5f40edc43e54da41b7acf8222e9cb888 (patch) | |
| tree | f28fe8c8748ece34518b7c0c2127ee11b0f764bb /arch/sh/kernel/perf_event.c | |
| parent | ARM: imx: replace cpu type check with ddr type check (diff) | |
| download | linux-bc4abc3e5f40edc43e54da41b7acf8222e9cb888.tar.xz linux-bc4abc3e5f40edc43e54da41b7acf8222e9cb888.zip | |
ARM: imx: add anatop settings for LPDDR2 when enter DSM mode
For LPDDR2 platform, no need to enable weak2P5 in DSM mode,
it can be pulled down to save power(~0.65mW).
And per design team's recommendation, we should disconnect
VDDHIGH and SNVS in DSM mode on i.MX6SL.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/sh/kernel/perf_event.c')
0 files changed, 0 insertions, 0 deletions