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author | Paul Mundt <lethal@linux-sh.org> | 2007-07-31 10:07:28 +0200 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2007-09-21 04:57:46 +0200 |
commit | e7bd34a15b85655f24d1b45edbe3bdfebf9d027e (patch) | |
tree | 051647273266582fe95dcc5cf008534c264be5ae /arch/sh/mm/pmb.c | |
parent | sh: intc - avoid SH7710 specific vector on SH7712 (diff) | |
download | linux-e7bd34a15b85655f24d1b45edbe3bdfebf9d027e.tar.xz linux-e7bd34a15b85655f24d1b45edbe3bdfebf9d027e.zip |
sh: Support explicit L1 cache disabling.
This reworks the cache mode configuration in Kconfig, and allows for
explicit selection of write-back/write-through/off configurations.
All of the cache flushing routines are optimized away for the off
case.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm/pmb.c')
-rw-r--r-- | arch/sh/mm/pmb.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c index a08a4a958add..7d43758dc244 100644 --- a/arch/sh/mm/pmb.c +++ b/arch/sh/mm/pmb.c @@ -145,7 +145,7 @@ repeat: ctrl_outl(vpn | PMB_V, mk_pmb_addr(pos)); -#ifdef CONFIG_SH_WRITETHROUGH +#ifdef CONFIG_CACHE_WRITETHROUGH /* * When we are in 32-bit address extended mode, CCR.CB becomes * invalid, so care must be taken to manually adjust cacheable |