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| author | Paul Mundt <lethal@linux-sh.org> | 2009-09-01 06:54:14 +0200 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2009-09-01 06:54:14 +0200 |
| commit | ac6a0cf6716bb46813d0161024c66c2af66e53d1 (patch) | |
| tree | c7f53b1a04c590032c022549f3186fb9b04f8358 /arch/sh/mm/tlb-sh4.c | |
| parent | sh: Fix up sh4_flush_dcache_page() build on UP. (diff) | |
| parent | sh: Fix dcache flushing for N-way write-through caches. (diff) | |
| download | linux-ac6a0cf6716bb46813d0161024c66c2af66e53d1.tar.xz linux-ac6a0cf6716bb46813d0161024c66c2af66e53d1.zip | |
Merge branch 'master' into sh/smp
Conflicts:
arch/sh/mm/cache-sh4.c
Diffstat (limited to 'arch/sh/mm/tlb-sh4.c')
| -rw-r--r-- | arch/sh/mm/tlb-sh4.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c index 7d3c63e707a5..8cf550e2570f 100644 --- a/arch/sh/mm/tlb-sh4.c +++ b/arch/sh/mm/tlb-sh4.c @@ -43,9 +43,12 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte) */ ctrl_outl(pte.pte_high, MMU_PTEA); #else - if (cpu_data->flags & CPU_HAS_PTEA) - /* TODO: make this look less hacky */ - ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA); + if (cpu_data->flags & CPU_HAS_PTEA) { + /* The last 3 bits and the first one of pteval contains + * the PTEA timing control and space attribute bits + */ + ctrl_outl(copy_ptea_attributes(pteval), MMU_PTEA); + } #endif /* Set PTEL register */ |