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authorMatt Fleming <matt@console-pimps.org>2010-03-21 20:51:43 +0100
committerPaul Mundt <lethal@linux-sh.org>2010-03-23 05:36:15 +0100
commita9eb4f6d1a168c830a206306dfbb1f95a7fed6b3 (patch)
tree6be98ed668898b2659e172e6344eff4178865f84 /arch/sh/mm
parentsh64: Remove long unused mid_sched macro (diff)
downloadlinux-a9eb4f6d1a168c830a206306dfbb1f95a7fed6b3.tar.xz
linux-a9eb4f6d1a168c830a206306dfbb1f95a7fed6b3.zip
sh: Flush ITLB too in PTEAEX's flush_tlb_page()
flush_tlb_page() can be used to flush TLB entries that map executable pages. Therefore, we need to ensure that the ITLB is also flushed in local_flush_tlb_page(). Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm')
-rw-r--r--arch/sh/mm/tlb-pteaex.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/sh/mm/tlb-pteaex.c b/arch/sh/mm/tlb-pteaex.c
index 32dc674c550c..bdd0982b56ee 100644
--- a/arch/sh/mm/tlb-pteaex.c
+++ b/arch/sh/mm/tlb-pteaex.c
@@ -73,5 +73,7 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
jump_to_uncached();
__raw_writel(page, MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT);
__raw_writel(asid, MMU_UTLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT);
+ __raw_writel(page, MMU_ITLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT);
+ __raw_writel(asid, MMU_ITLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT);
back_to_cached();
}