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| author | Paul Mundt <lethal@linux-sh.org> | 2006-12-26 07:29:19 +0100 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2007-02-13 02:54:44 +0100 |
| commit | 7a847f819063b80cc5b38d39e8aad4d60f6ca2fd (patch) | |
| tree | f60ac00a1860d188e83f31883df7be807e500bff /arch/sh | |
| parent | sh: Solution Engine 770x IPR irq setup. (diff) | |
| download | linux-7a847f819063b80cc5b38d39e8aad4d60f6ca2fd.tar.xz linux-7a847f819063b80cc5b38d39e8aad4d60f6ca2fd.zip | |
sh: More tidying for large base pages.
There were a few more things that needed fixing up, namely THREAD_SIZE
and the TLB miss handler where certain PTRS_PER_PGD == PTRS_PER_PTE
assumptions were being made.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
| -rw-r--r-- | arch/sh/Kconfig | 2 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/entry.S | 10 |
2 files changed, 5 insertions, 7 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 4f3891215b87..04cbc88e9b9f 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -596,6 +596,8 @@ menu "Boot options" config ZERO_PAGE_OFFSET hex "Zero page offset" default "0x00004000" if SH_MPC1211 || SH_SH03 + default "0x00010000" if PAGE_SIZE_64KB + default "0x00002000" if PAGE_SIZE_8KB default "0x00001000" help This sets the default offset of zero page. diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S index 014ac37ca16a..1c520358ba90 100644 --- a/arch/sh/kernel/cpu/sh3/entry.S +++ b/arch/sh/kernel/cpu/sh3/entry.S @@ -332,12 +332,6 @@ general_exception: ! ! -/* This code makes some assumptions to improve performance. - * Make sure they are stil true. */ -#if PTRS_PER_PGD != PTRS_PER_PTE -#error PGD and PTE sizes don't match -#endif - /* gas doesn't flag impossible values for mov #immediate as an error */ #if (_PAGE_PRESENT >> 2) > 0x7f #error cannot load PAGE_PRESENT as an immediate @@ -399,6 +393,7 @@ tlb_miss: bt 20f ! 110 BR + mov.w 3f, k3 ! 8 LS (latency=2) (PTRS_PER_PTE-1) << 2 and k3, k0 ! 78 EX mov.w 5f, k4 ! 8 LS (latency=2) _PAGE_PRESENT @@ -491,8 +486,9 @@ tlb_miss: .align 5 ! Once cache line if possible... 1: .long swapper_pg_dir +3: .short (PTRS_PER_PTE-1) << 2 4: .short (PTRS_PER_PGD-1) << 2 -5: .short _PAGE_PRESENT +5: .long _PAGE_PRESENT 7: .long _PAGE_FLAGS_HARDWARE_MASK 8: .long MMU_PTEH #ifdef COUNT_EXCEPTIONS |