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| author | Artur Rojek <contact@artur-rojek.eu> | 2023-07-11 01:31:32 +0200 |
|---|---|---|
| committer | John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> | 2023-07-13 08:37:53 +0200 |
| commit | 7c28a35e19fafa1d3b367bcd3ec4021427a9397b (patch) | |
| tree | 2ca966d4c73ca9d59e512e879a36465d2f01ff00 /arch/sh | |
| parent | sh: mach-dreamcast: Handle virq offset in cascaded IRQ demux (diff) | |
| download | linux-7c28a35e19fafa1d3b367bcd3ec4021427a9397b.tar.xz linux-7c28a35e19fafa1d3b367bcd3ec4021427a9397b.zip | |
sh: hd64461: Handle virq offset for offchip IRQ base and HD64461 IRQ
A recent change to start counting SuperH IRQ #s from 16 breaks support
for the Hitachi HD64461 companion chip.
Move the offchip IRQ base and HD64461 IRQ # by 16 in order to
accommodate for the new virq numbering rules.
Fixes: a8ac2961148e ("sh: Avoid using IRQ0 on SH3 and SH4")
Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Link: https://lore.kernel.org/r/20230710233132.69734-1-contact@artur-rojek.eu
Signed-off-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Diffstat (limited to 'arch/sh')
| -rw-r--r-- | arch/sh/cchips/Kconfig | 4 | ||||
| -rw-r--r-- | arch/sh/include/asm/hd64461.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/sh/cchips/Kconfig b/arch/sh/cchips/Kconfig index efde2edb5627..9659a0bc58de 100644 --- a/arch/sh/cchips/Kconfig +++ b/arch/sh/cchips/Kconfig @@ -29,9 +29,9 @@ endchoice config HD64461_IRQ int "HD64461 IRQ" depends on HD64461 - default "36" + default "52" help - The default setting of the HD64461 IRQ is 36. + The default setting of the HD64461 IRQ is 52. Do not change this unless you know what you are doing. diff --git a/arch/sh/include/asm/hd64461.h b/arch/sh/include/asm/hd64461.h index afb24cb034b1..d2c485fa333b 100644 --- a/arch/sh/include/asm/hd64461.h +++ b/arch/sh/include/asm/hd64461.h @@ -229,7 +229,7 @@ #define HD64461_NIMR HD64461_IO_OFFSET(0x5002) #define HD64461_IRQBASE OFFCHIP_IRQ_BASE -#define OFFCHIP_IRQ_BASE 64 +#define OFFCHIP_IRQ_BASE (64 + 16) #define HD64461_IRQ_NUM 16 #define HD64461_IRQ_UART (HD64461_IRQBASE+5) |