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| author | Nitin Gupta <nitin.m.gupta@oracle.com> | 2016-07-29 09:54:21 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-07-29 19:49:16 +0200 |
| commit | 7bc3777ca19cf9ecc5533980210f29c51df7fe5e (patch) | |
| tree | baaa60bd0a6dfe46a902d7e151005b013f340e7f /arch/sparc/include/asm/tsb.h | |
| parent | sparc64 mm: Fix base TSB sizing when hugetlb pages are used (diff) | |
| download | linux-7bc3777ca19cf9ecc5533980210f29c51df7fe5e.tar.xz linux-7bc3777ca19cf9ecc5533980210f29c51df7fe5e.zip | |
sparc64: Trim page tables for 8M hugepages
For PMD aligned (8M) hugepages, we currently allocate
all four page table levels which is wasteful. We now
allocate till PMD level only which saves memory usage
from page tables.
Also, when freeing page table for 8M hugepage backed region,
make sure we don't try to access non-existent PTE level.
Orabug: 22630259
Signed-off-by: Nitin Gupta <nitin.m.gupta@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/include/asm/tsb.h')
| -rw-r--r-- | arch/sparc/include/asm/tsb.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sparc/include/asm/tsb.h b/arch/sparc/include/asm/tsb.h index c6a155c3904e..32258e08da03 100644 --- a/arch/sparc/include/asm/tsb.h +++ b/arch/sparc/include/asm/tsb.h @@ -203,7 +203,7 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end; * We have to propagate the 4MB bit of the virtual address * because we are fabricating 8MB pages using 4MB hw pages. */ -#ifdef CONFIG_TRANSPARENT_HUGEPAGE +#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) #define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \ brz,pn REG1, FAIL_LABEL; \ sethi %uhi(_PAGE_PMD_HUGE), REG2; \ |