diff options
| author | Al Viro <viro@zeniv.linux.org.uk> | 2007-07-22 04:18:57 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2007-07-22 04:18:57 +0200 |
| commit | 32231a66b4e1b649c346dc76b7d191f7e64a663a (patch) | |
| tree | a9c1a6bb8d0889a9cf87de4c05e5ed0d688c583a /arch/sparc/kernel/sun4c_irq.c | |
| parent | [SPARC32]: Fix rounding errors in ndelay/udelay implementation. (diff) | |
| download | linux-32231a66b4e1b649c346dc76b7d191f7e64a663a.tar.xz linux-32231a66b4e1b649c346dc76b7d191f7e64a663a.zip | |
[SPARC32]: clean include/asm-sparc/irq.h
Move stuff used only by arch/sparc/kernel/* into arch/sparc/kernel/irq.h
and into individual files in there (e.g. macros internal to sun4m_irq.c,
etc.)
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel/sun4c_irq.c')
| -rw-r--r-- | arch/sparc/kernel/sun4c_irq.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/sparc/kernel/sun4c_irq.c b/arch/sparc/kernel/sun4c_irq.c index 009e891a4329..c6ac9fc52563 100644 --- a/arch/sparc/kernel/sun4c_irq.c +++ b/arch/sparc/kernel/sun4c_irq.c @@ -18,6 +18,7 @@ #include <linux/interrupt.h> #include <linux/slab.h> #include <linux/init.h> +#include "irq.h" #include <asm/ptrace.h> #include <asm/processor.h> @@ -40,6 +41,20 @@ static struct resource sun4c_timer_eb = { "sun4c_timer" }; static struct resource sun4c_intr_eb = { "sun4c_intr" }; #endif +/* + * Bit field defines for the interrupt registers on various + * Sparc machines. + */ + +/* The sun4c interrupt register. */ +#define SUN4C_INT_ENABLE 0x01 /* Allow interrupts. */ +#define SUN4C_INT_E14 0x80 /* Enable level 14 IRQ. */ +#define SUN4C_INT_E10 0x20 /* Enable level 10 IRQ. */ +#define SUN4C_INT_E8 0x10 /* Enable level 8 IRQ. */ +#define SUN4C_INT_E6 0x08 /* Enable level 6 IRQ. */ +#define SUN4C_INT_E4 0x04 /* Enable level 4 IRQ. */ +#define SUN4C_INT_E1 0x02 /* Enable level 1 IRQ. */ + /* Pointer to the interrupt enable byte * * Dave Redman (djhr@tadpole.co.uk) |