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| author | Kjetil Oftedal <oftedal@gmail.com> | 2011-10-20 01:20:50 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2011-10-20 01:20:50 +0200 |
| commit | aad4564498dcb0aad769a79e5e2aa9a661dfb51f (patch) | |
| tree | c78a9d5396c25fd56b43f8531e87b251a12b1431 /arch/sparc/kernel | |
| parent | sparc: Avoid calling sigprocmask() (diff) | |
| download | linux-aad4564498dcb0aad769a79e5e2aa9a661dfb51f.tar.xz linux-aad4564498dcb0aad769a79e5e2aa9a661dfb51f.zip | |
sparc: Add alignment flag to PCI expansion resources
Currently no type of alignment is specified for PCI expansion roms while
parsing the openfirmware tree. This causes calls to pci_map_rom() to fail.
IORESOURCE_SIZEALIGN is the default alignment used for rom resouces in
pci/probe.c, and has been verified to work with various cards on a ultra 10.
Signed-off-By: Kjetil Oftedal <oftedal@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel')
| -rw-r--r-- | arch/sparc/kernel/pci.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c index 1e94f946570e..8aa0d4408586 100644 --- a/arch/sparc/kernel/pci.c +++ b/arch/sparc/kernel/pci.c @@ -230,7 +230,8 @@ static void pci_parse_of_addrs(struct platform_device *op, res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2]; } else if (i == dev->rom_base_reg) { res = &dev->resource[PCI_ROM_RESOURCE]; - flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE; + flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE + | IORESOURCE_SIZEALIGN; } else { printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i); continue; |