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| author | Nitin Gupta <nitin.m.gupta@oracle.com> | 2016-07-29 09:54:21 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-07-29 19:49:16 +0200 |
| commit | 7bc3777ca19cf9ecc5533980210f29c51df7fe5e (patch) | |
| tree | baaa60bd0a6dfe46a902d7e151005b013f340e7f /arch/sparc/mm/init_64.c | |
| parent | sparc64 mm: Fix base TSB sizing when hugetlb pages are used (diff) | |
| download | linux-7bc3777ca19cf9ecc5533980210f29c51df7fe5e.tar.xz linux-7bc3777ca19cf9ecc5533980210f29c51df7fe5e.zip | |
sparc64: Trim page tables for 8M hugepages
For PMD aligned (8M) hugepages, we currently allocate
all four page table levels which is wasteful. We now
allocate till PMD level only which saves memory usage
from page tables.
Also, when freeing page table for 8M hugepage backed region,
make sure we don't try to access non-existent PTE level.
Orabug: 22630259
Signed-off-by: Nitin Gupta <nitin.m.gupta@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/mm/init_64.c')
| -rw-r--r-- | arch/sparc/mm/init_64.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c index aef153f9fdac..65457c9f1365 100644 --- a/arch/sparc/mm/init_64.c +++ b/arch/sparc/mm/init_64.c @@ -347,10 +347,12 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t * #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) if ((mm->context.hugetlb_pte_count || mm->context.thp_pte_count) && - is_hugetlb_pte(pte)) + is_hugetlb_pte(pte)) { + /* We are fabricating 8MB pages using 4MB real hw pages. */ + pte_val(pte) |= (address & (1UL << REAL_HPAGE_SHIFT)); __update_mmu_tsb_insert(mm, MM_TSB_HUGE, REAL_HPAGE_SHIFT, address, pte_val(pte)); - else + } else #endif __update_mmu_tsb_insert(mm, MM_TSB_BASE, PAGE_SHIFT, address, pte_val(pte)); |