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| author | David S. Miller <davem@sunset.davemloft.net> | 2006-02-07 00:52:05 +0100 |
|---|---|---|
| committer | David S. Miller <davem@sunset.davemloft.net> | 2006-03-20 10:11:51 +0100 |
| commit | 840aaef8db32572b6d11e0d5cb5e6efcbc812000 (patch) | |
| tree | af8b8364f314d9d71c5ae81ffb48b46c53c6ae6c /arch/sparc64/kernel/setup.c | |
| parent | [SPARC64]: Sanitize %pstate writes for sun4v. (diff) | |
| download | linux-840aaef8db32572b6d11e0d5cb5e6efcbc812000.tar.xz linux-840aaef8db32572b6d11e0d5cb5e6efcbc812000.zip | |
[SPARC64]: Add missing memory barriers to instruction patching functions.
V9 requires a write memory barrier before the instruction flush.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/setup.c')
| -rw-r--r-- | arch/sparc64/kernel/setup.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c index e22bf5fc92ce..40acac5b8337 100644 --- a/arch/sparc64/kernel/setup.c +++ b/arch/sparc64/kernel/setup.c @@ -529,15 +529,19 @@ static void __init per_cpu_patch(void) }; *(unsigned int *) (addr + 0) = insns[0]; + wmb(); __asm__ __volatile__("flush %0" : : "r" (addr + 0)); *(unsigned int *) (addr + 4) = insns[1]; + wmb(); __asm__ __volatile__("flush %0" : : "r" (addr + 4)); *(unsigned int *) (addr + 8) = insns[2]; + wmb(); __asm__ __volatile__("flush %0" : : "r" (addr + 8)); *(unsigned int *) (addr + 12) = insns[3]; + wmb(); __asm__ __volatile__("flush %0" : : "r" (addr + 12)); p++; @@ -558,6 +562,7 @@ static void __init gl_patch(void) unsigned long addr = p1->addr; *(unsigned int *) (addr + 0) = p1->insn; + wmb(); __asm__ __volatile__("flush %0" : : "r" (addr + 0)); p1++; @@ -568,9 +573,11 @@ static void __init gl_patch(void) unsigned long addr = p2->addr; *(unsigned int *) (addr + 0) = p2->insns[0]; + wmb(); __asm__ __volatile__("flush %0" : : "r" (addr + 0)); *(unsigned int *) (addr + 3) = p2->insns[1]; + wmb(); __asm__ __volatile__("flush %0" : : "r" (addr + 4)); p2++; |