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authorLaxman Dewangan <ldewangan@nvidia.com>2012-10-30 08:05:24 +0100
committerStephen Warren <swarren@nvidia.com>2012-11-05 19:36:23 +0100
commitffa05e450c3ce6ece6c5e3bdfc202c86e6d4517f (patch)
treedbef1b618769de768343efa0fe61817cb318a41a /arch/tile/configs
parentARM: tegra: common: using OF api for L2 cache init (diff)
downloadlinux-ffa05e450c3ce6ece6c5e3bdfc202c86e6d4517f.tar.xz
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ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dt
Add OF_DEV_AUXDATA for slink driver for Tegra20 and Tegra30 board dt files. Set the parent clock of slink controller to PLLP and configure clock to 100MHz. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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