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authorChris Metcalf <cmetcalf@tilera.com>2013-08-07 18:11:56 +0200
committerChris Metcalf <cmetcalf@tilera.com>2013-08-13 22:26:13 +0200
commit70d2b5958a04139fbffecf27791cf913dce8038e (patch)
tree7df7a5b793bf53dfd319faac4f711487770511ef /arch/tile/kernel/intvec_64.S
parenttile: make register dumps more readable (diff)
downloadlinux-70d2b5958a04139fbffecf27791cf913dce8038e.tar.xz
linux-70d2b5958a04139fbffecf27791cf913dce8038e.zip
tile: improve illegal translation interrupt handling
First, don't re-enable interrupts blindly in the Linux trap handler. We already handle page faults this way; synchronous interrupts like ILL_TRANS will fire even when interrupts are disabled, and we don't want to re-enable interrupts in that case. For ILL_TRANS, we now pass the ILL_VA_PC reason into the trap handler so we can report it properly; this is the address that caused the illegal translation trap. We print the address as part of the pr_alert() message now if it's coming from the kernel. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/kernel/intvec_64.S')
-rw-r--r--arch/tile/kernel/intvec_64.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/tile/kernel/intvec_64.S b/arch/tile/kernel/intvec_64.S
index 38a60f27707c..562886db780b 100644
--- a/arch/tile/kernel/intvec_64.S
+++ b/arch/tile/kernel/intvec_64.S
@@ -492,7 +492,7 @@ intvec_\vecname:
mfspr r3, SPR_SYSTEM_SAVE_K_2 /* info about page fault */
.else
.ifc \vecnum, INT_ILL_TRANS
- mfspr r2, ILL_TRANS_REASON
+ mfspr r2, ILL_VA_PC
.else
.ifc \vecnum, INT_DOUBLE_FAULT
mfspr r2, SPR_SYSTEM_SAVE_K_2 /* double fault info from HV */