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| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-04-10 10:52:59 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-04-10 10:52:59 +0200 |
| commit | b920eb41a8241c54efbbd4f2ed6d074f497b0d9e (patch) | |
| tree | 5941091817e932add192f8e58dc88d483322e214 /arch/tile/kernel/single_step.c | |
| parent | regulator: Fix build error for mc13783 and mc13892 (diff) | |
| parent | Linux 3.4-rc2 (diff) | |
| download | linux-b920eb41a8241c54efbbd4f2ed6d074f497b0d9e.tar.xz linux-b920eb41a8241c54efbbd4f2ed6d074f497b0d9e.zip | |
Merge tag 'v3.4-rc2' into regulator-drivers
Linux 3.4-rc2 contains some fixes that further patches depend upon.
Diffstat (limited to 'arch/tile/kernel/single_step.c')
| -rw-r--r-- | arch/tile/kernel/single_step.c | 31 |
1 files changed, 19 insertions, 12 deletions
diff --git a/arch/tile/kernel/single_step.c b/arch/tile/kernel/single_step.c index bc1eb586e24d..9efbc1391b3c 100644 --- a/arch/tile/kernel/single_step.c +++ b/arch/tile/kernel/single_step.c @@ -153,6 +153,25 @@ static tile_bundle_bits rewrite_load_store_unaligned( if (((unsigned long)addr % size) == 0) return bundle; + /* + * Return SIGBUS with the unaligned address, if requested. + * Note that we return SIGBUS even for completely invalid addresses + * as long as they are in fact unaligned; this matches what the + * tilepro hardware would be doing, if it could provide us with the + * actual bad address in an SPR, which it doesn't. + */ + if (unaligned_fixup == 0) { + siginfo_t info = { + .si_signo = SIGBUS, + .si_code = BUS_ADRALN, + .si_addr = addr + }; + trace_unhandled_signal("unaligned trap", regs, + (unsigned long)addr, SIGBUS); + force_sig_info(info.si_signo, &info, current); + return (tilepro_bundle_bits) 0; + } + #ifndef __LITTLE_ENDIAN # error We assume little-endian representation with copy_xx_user size 2 here #endif @@ -192,18 +211,6 @@ static tile_bundle_bits rewrite_load_store_unaligned( return (tile_bundle_bits) 0; } - if (unaligned_fixup == 0) { - siginfo_t info = { - .si_signo = SIGBUS, - .si_code = BUS_ADRALN, - .si_addr = addr - }; - trace_unhandled_signal("unaligned trap", regs, - (unsigned long)addr, SIGBUS); - force_sig_info(info.si_signo, &info, current); - return (tile_bundle_bits) 0; - } - if (unaligned_printk || unaligned_fixup_count == 0) { pr_info("Process %d/%s: PC %#lx: Fixup of" " unaligned %s at %#lx.\n", |