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author | Yu Zhang <yu.c.zhang@linux.intel.com> | 2017-08-24 14:27:54 +0200 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2017-08-24 18:09:16 +0200 |
commit | 2a7266a8f9074f03c014dca641721d451881a42b (patch) | |
tree | 385eaeeee888760d071d1240f4580b4457f35266 /arch/tile | |
parent | KVM: MMU: check guest CR3 reserved bits based on its physical address width. (diff) | |
download | linux-2a7266a8f9074f03c014dca641721d451881a42b.tar.xz linux-2a7266a8f9074f03c014dca641721d451881a42b.zip |
KVM: MMU: Rename PT64_ROOT_LEVEL to PT64_ROOT_4LEVEL.
Now we have 4 level page table and 5 level page table in 64 bits
long mode, let's rename the PT64_ROOT_LEVEL to PT64_ROOT_4LEVEL,
then we can use PT64_ROOT_5LEVEL for 5 level page table, it's
helpful to make the code more clear.
Also PT64_ROOT_MAX_LEVEL is defined as 4, so that we can just
redefine it to 5 whenever a replacement is needed for 5 level
paging.
Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/tile')
0 files changed, 0 insertions, 0 deletions