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authorKurt McAlpine <kurtmcalpine@gmail.com>2014-08-06 22:50:25 +0200
committerChris Metcalf <cmetcalf@tilera.com>2014-10-02 16:19:34 +0200
commit4cde4cc87a19cfe7351e3d0fd87d8a49271781f6 (patch)
tree913acc121968b91d54aa68e01a2ac018b008afba /arch/tile
parenttilegx: Enable ARCH_SUPPORTS_ATOMIC_RMW (diff)
downloadlinux-4cde4cc87a19cfe7351e3d0fd87d8a49271781f6.tar.xz
linux-4cde4cc87a19cfe7351e3d0fd87d8a49271781f6.zip
Removed repeated word in comments
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile')
-rw-r--r--arch/tile/include/uapi/arch/sim_def.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/tile/include/uapi/arch/sim_def.h b/arch/tile/include/uapi/arch/sim_def.h
index 4b44a2b6a09a..1c069537ae41 100644
--- a/arch/tile/include/uapi/arch/sim_def.h
+++ b/arch/tile/include/uapi/arch/sim_def.h
@@ -360,19 +360,19 @@
* @{
*/
-/** Use with with SIM_PROFILER_CHIP_xxx to control the memory controllers. */
+/** Use with SIM_PROFILER_CHIP_xxx to control the memory controllers. */
#define SIM_CHIP_MEMCTL 0x001
-/** Use with with SIM_PROFILER_CHIP_xxx to control the XAUI interface. */
+/** Use with SIM_PROFILER_CHIP_xxx to control the XAUI interface. */
#define SIM_CHIP_XAUI 0x002
-/** Use with with SIM_PROFILER_CHIP_xxx to control the PCIe interface. */
+/** Use with SIM_PROFILER_CHIP_xxx to control the PCIe interface. */
#define SIM_CHIP_PCIE 0x004
-/** Use with with SIM_PROFILER_CHIP_xxx to control the MPIPE interface. */
+/** Use with SIM_PROFILER_CHIP_xxx to control the MPIPE interface. */
#define SIM_CHIP_MPIPE 0x008
-/** Use with with SIM_PROFILER_CHIP_xxx to control the TRIO interface. */
+/** Use with SIM_PROFILER_CHIP_xxx to control the TRIO interface. */
#define SIM_CHIP_TRIO 0x010
/** Reference all chip devices. */