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authorIngo Molnar <mingo@elte.hu>2008-10-27 10:50:54 +0100
committerIngo Molnar <mingo@elte.hu>2008-10-27 10:50:54 +0100
commit4944dd62de21230af039eda7cd218e9a09021d11 (patch)
treebac70f7bab8506c7e1b0408bacbdb0b1d77262e9 /arch/um/include/asm/cache.h
parentftrace: warning in kernel/trace/ftrace.c (diff)
parentLinux 2.6.28-rc2 (diff)
downloadlinux-4944dd62de21230af039eda7cd218e9a09021d11.tar.xz
linux-4944dd62de21230af039eda7cd218e9a09021d11.zip
Merge commit 'v2.6.28-rc2' into tracing/urgent
Diffstat (limited to 'arch/um/include/asm/cache.h')
-rw-r--r--arch/um/include/asm/cache.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/um/include/asm/cache.h b/arch/um/include/asm/cache.h
new file mode 100644
index 000000000000..19e1bdd67416
--- /dev/null
+++ b/arch/um/include/asm/cache.h
@@ -0,0 +1,17 @@
+#ifndef __UM_CACHE_H
+#define __UM_CACHE_H
+
+
+#if defined(CONFIG_UML_X86) && !defined(CONFIG_64BIT)
+# define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
+#elif defined(CONFIG_UML_X86) /* 64-bit */
+# define L1_CACHE_SHIFT 6 /* Should be 7 on Intel */
+#else
+/* XXX: this was taken from x86, now it's completely random. Luckily only
+ * affects SMP padding. */
+# define L1_CACHE_SHIFT 5
+#endif
+
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+
+#endif