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author | Christoph Lameter <cl@linux.com> | 2011-06-01 19:25:47 +0200 |
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committer | H. Peter Anvin <hpa@zytor.com> | 2011-06-25 21:17:32 +0200 |
commit | 3824abd1279ef75f791c43a6b1e3162ae0692b42 (patch) | |
tree | f8ca989ec654a9f5cffc28eca7acb4e8a5389814 /arch/x86/Kconfig.cpu | |
parent | Linux 3.0-rc4 (diff) | |
download | linux-3824abd1279ef75f791c43a6b1e3162ae0692b42.tar.xz linux-3824abd1279ef75f791c43a6b1e3162ae0692b42.zip |
x86: Add support for cmpxchg_double
A simple implementation that only supports the word size and does not
have a fallback mode (would require a spinlock).
Add 32 and 64 bit support for cmpxchg_double. cmpxchg double uses
the cmpxchg8b or cmpxchg16b instruction on x86 processors to compare
and swap 2 machine words. This allows lockless algorithms to move more
context information through critical sections.
Set a flag CONFIG_CMPXCHG_DOUBLE to signal that support for double word
cmpxchg detection has been build into the kernel. Note that each subsystem
using cmpxchg_double has to implement a fall back mechanism as long as
we offer support for processors that do not implement cmpxchg_double.
Reviewed-by: H. Peter Anvin <hpa@zytor.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Pekka Enberg <penberg@cs.helsinki.fi>
Signed-off-by: Christoph Lameter <cl@linux.com>
Link: http://lkml.kernel.org/r/20110601172614.173427964@linux.com
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/Kconfig.cpu')
-rw-r--r-- | arch/x86/Kconfig.cpu | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu index 6a7cfdf8ff69..e3ca7e0d858c 100644 --- a/arch/x86/Kconfig.cpu +++ b/arch/x86/Kconfig.cpu @@ -312,6 +312,9 @@ config X86_CMPXCHG config CMPXCHG_LOCAL def_bool X86_64 || (X86_32 && !M386) +config CMPXCHG_DOUBLE + def_bool y + config X86_L1_CACHE_SHIFT int default "7" if MPENTIUM4 || MPSC |