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| author | Ralf Baechle <ralf@linux-mips.org> | 2014-03-31 18:17:33 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-31 18:17:33 +0200 |
| commit | ade63aada79c61bcd5f51cbd310f237399892268 (patch) | |
| tree | 4f8605528bfd9b6261679883974b9ac4870223dd /arch/x86/Kconfig.cpu | |
| parent | MIPS: CPC: Use __raw_ memory access functions (diff) | |
| parent | MIPS: Hibernate: Flush TLB entries in swsusp_arch_resume() (diff) | |
| download | linux-ade63aada79c61bcd5f51cbd310f237399892268.tar.xz linux-ade63aada79c61bcd5f51cbd310f237399892268.zip | |
Merge branch '3.14-fixes' into mips-for-linux-next
Diffstat (limited to 'arch/x86/Kconfig.cpu')
| -rw-r--r-- | arch/x86/Kconfig.cpu | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu index c026cca5602c..f3aaf231b4e5 100644 --- a/arch/x86/Kconfig.cpu +++ b/arch/x86/Kconfig.cpu @@ -341,10 +341,6 @@ config X86_USE_3DNOW def_bool y depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML -config X86_OOSTORE - def_bool y - depends on (MWINCHIP3D || MWINCHIPC6) && MTRR - # # P6_NOPs are a relatively minor optimization that require a family >= # 6 processor, except that it is broken on certain VIA chips. |