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author | Takashi Iwai <tiwai@suse.de> | 2009-12-14 18:01:56 +0100 |
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committer | Takashi Iwai <tiwai@suse.de> | 2009-12-14 18:01:56 +0100 |
commit | b89371621e5bedc84498ced2c5c33976bd1b2f64 (patch) | |
tree | b309919239586e25617a17785b827577b1abb6b5 /arch/x86/Kconfig | |
parent | sound: add Edirol UA-101 support (diff) | |
parent | ALSA: sb_mixer: convert pointer tables to mixer control tables (diff) | |
download | linux-b89371621e5bedc84498ced2c5c33976bd1b2f64.tar.xz linux-b89371621e5bedc84498ced2c5c33976bd1b2f64.zip |
Merge branch 'next/isa' into topic/misc
Diffstat (limited to 'arch/x86/Kconfig')
-rw-r--r-- | arch/x86/Kconfig | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 72ace9515a07..32a1918e1b88 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -49,7 +49,9 @@ config X86 select HAVE_KERNEL_GZIP select HAVE_KERNEL_BZIP2 select HAVE_KERNEL_LZMA + select HAVE_HW_BREAKPOINT select HAVE_ARCH_KMEMCHECK + select HAVE_USER_RETURN_NOTIFIER config OUTPUT_FORMAT string @@ -1330,7 +1332,9 @@ config MATH_EMULATION kernel, it won't hurt. config MTRR - bool "MTRR (Memory Type Range Register) support" + bool + default y + prompt "MTRR (Memory Type Range Register) support" if EMBEDDED ---help--- On Intel P6 family processors (Pentium Pro, Pentium II and later) the Memory Type Range Registers (MTRRs) may be used to control @@ -1396,7 +1400,8 @@ config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT config X86_PAT bool - prompt "x86 PAT support" + default y + prompt "x86 PAT support" if EMBEDDED depends on MTRR ---help--- Use PAT attributes to setup page level cache control. @@ -1602,7 +1607,7 @@ config COMPAT_VDSO depends on X86_32 || IA32_EMULATION ---help--- Map the 32-bit VDSO to the predictable old-style address too. - ---help--- + Say N here if you are running a sufficiently recent glibc version (2.3.3 or later), to remove the high-mapped VDSO mapping and to exclusively use the randomized VDSO. |