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authorOliver Neukum <oneukum@suse.de>2013-10-01 14:34:46 +0200
committerHerbert Xu <herbert@gondor.apana.org.au>2013-10-07 08:17:10 +0200
commit16c0c4e1656c14ef9deac189a4240b5ca19c6919 (patch)
tree6d5cc74603a36d626dbf3aa6a685e015ce69da6e /arch/x86/crypto
parentcrypto: mv_cesa - Remove redundant of_match_ptr (diff)
downloadlinux-16c0c4e1656c14ef9deac189a4240b5ca19c6919.tar.xz
linux-16c0c4e1656c14ef9deac189a4240b5ca19c6919.zip
crypto: sha256_ssse3 - also test for BMI2
The AVX2 implementation also uses BMI2 instructions, but doesn't test for their availability. The assumption that AVX2 and BMI2 always go together is false. Some Haswells have AVX2 but not BMI2. Signed-off-by: Oliver Neukum <oneukum@suse.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'arch/x86/crypto')
-rw-r--r--arch/x86/crypto/sha256_ssse3_glue.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/crypto/sha256_ssse3_glue.c b/arch/x86/crypto/sha256_ssse3_glue.c
index 85021a4a8e0c..f248546da1ca 100644
--- a/arch/x86/crypto/sha256_ssse3_glue.c
+++ b/arch/x86/crypto/sha256_ssse3_glue.c
@@ -281,7 +281,7 @@ static int __init sha256_ssse3_mod_init(void)
/* allow AVX to override SSSE3, it's a little faster */
if (avx_usable()) {
#ifdef CONFIG_AS_AVX2
- if (boot_cpu_has(X86_FEATURE_AVX2))
+ if (boot_cpu_has(X86_FEATURE_AVX2) && boot_cpu_has(X86_FEATURE_BMI2))
sha256_transform_asm = sha256_transform_rorx;
else
#endif