diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2021-06-11 15:03:16 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2021-06-24 08:49:03 +0200 |
| commit | 7f049fbdd57f6ea71dc741d903c19c73b2f70950 (patch) | |
| tree | 5b11e726fd368def34a736cfa73511ac95ded45e /arch/x86/events | |
| parent | Linux 5.13-rc7 (diff) | |
| download | linux-7f049fbdd57f6ea71dc741d903c19c73b2f70950.tar.xz linux-7f049fbdd57f6ea71dc741d903c19c73b2f70950.zip | |
perf/x86/intel/lbr: Zero the xstate buffer on allocation
XRSTORS requires a valid xstate buffer to work correctly. XSAVES does not
guarantee to write a fully valid buffer according to the SDM:
"XSAVES does not write to any parts of the XSAVE header other than the
XSTATE_BV and XCOMP_BV fields."
XRSTORS triggers a #GP:
"If bytes 63:16 of the XSAVE header are not all zero."
It's dubious at best how this can work at all when the buffer is not zeroed
before use.
Allocate the buffers with __GFP_ZERO to prevent XRSTORS failure.
Fixes: ce711ea3cab9 ("perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switch")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/87wnr0wo2z.ffs@nanos.tec.linutronix.de
Diffstat (limited to 'arch/x86/events')
| -rw-r--r-- | arch/x86/events/intel/lbr.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c index 4409d2cccfda..e8453de7a964 100644 --- a/arch/x86/events/intel/lbr.c +++ b/arch/x86/events/intel/lbr.c @@ -731,7 +731,8 @@ void reserve_lbr_buffers(void) if (!kmem_cache || cpuc->lbr_xsave) continue; - cpuc->lbr_xsave = kmem_cache_alloc_node(kmem_cache, GFP_KERNEL, + cpuc->lbr_xsave = kmem_cache_alloc_node(kmem_cache, + GFP_KERNEL | __GFP_ZERO, cpu_to_node(cpu)); } } |