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authorFenghua Yu <fenghua.yu@intel.com>2009-03-27 22:22:44 +0100
committerDavid Woodhouse <David.Woodhouse@intel.com>2009-04-03 22:45:59 +0200
commitb24696bc55f66fecc30715e003f10fc2555a9271 (patch)
tree3ef565bf041a06106a73d0b27ccc256845ef5644 /arch/x86/include/asm/apic.h
parentIntel IOMMU Suspend/Resume Support - Queued Invalidation (diff)
downloadlinux-b24696bc55f66fecc30715e003f10fc2555a9271.tar.xz
linux-b24696bc55f66fecc30715e003f10fc2555a9271.zip
Intel IOMMU Suspend/Resume Support - Interrupt Remapping
This patch enables suspend/resume for interrupt remapping. During suspend, interrupt remapping is disabled. When resume, interrupt remapping is enabled again. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'arch/x86/include/asm/apic.h')
-rw-r--r--arch/x86/include/asm/apic.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index df8a300dfe6c..f9f0866ed6f8 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -108,6 +108,10 @@ extern void native_apic_icr_write(u32 low, u32 id);
extern u64 native_apic_icr_read(void);
#ifdef CONFIG_X86_X2APIC
+
+#define EIM_8BIT_APIC_ID 0
+#define EIM_32BIT_APIC_ID 1
+
/*
* Make previous memory operations globally visible before
* sending the IPI through x2apic wrmsr. We need a serializing instruction or