diff options
| author | Sean Christopherson <sean.j.christopherson@intel.com> | 2020-11-12 23:01:14 +0100 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2020-11-17 14:36:13 +0100 |
| commit | e7b6385b01d8e9fb7a97887c3ea649abb95bb8c8 (patch) | |
| tree | 6d9693abe4e3dfde5baf6dfd5f8e56c5fc21102f /arch/x86/include/asm/disabled-features.h | |
| parent | x86/sgx: Add wrappers for ENCLS functions (diff) | |
| download | linux-e7b6385b01d8e9fb7a97887c3ea649abb95bb8c8.tar.xz linux-e7b6385b01d8e9fb7a97887c3ea649abb95bb8c8.zip | |
x86/cpufeatures: Add Intel SGX hardware bits
Populate X86_FEATURE_SGX feature from CPUID and tie it to the Kconfig
option with disabled-features.h.
IA32_FEATURE_CONTROL.SGX_ENABLE must be examined in addition to the CPUID
bits to enable full SGX support. The BIOS must both set this bit and lock
IA32_FEATURE_CONTROL for SGX to be supported (Intel SDM section 36.7.1).
The setting or clearing of this bit has no impact on the CPUID bits above,
which is why it needs to be detected separately.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Co-developed-by: Jarkko Sakkinen <jarkko@kernel.org>
Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Jethro Beekman <jethro@fortanix.com>
Link: https://lkml.kernel.org/r/20201112220135.165028-4-jarkko@kernel.org
Diffstat (limited to 'arch/x86/include/asm/disabled-features.h')
| -rw-r--r-- | arch/x86/include/asm/disabled-features.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h index 5861d34f9771..7947cb1782da 100644 --- a/arch/x86/include/asm/disabled-features.h +++ b/arch/x86/include/asm/disabled-features.h @@ -62,6 +62,12 @@ # define DISABLE_ENQCMD (1 << (X86_FEATURE_ENQCMD & 31)) #endif +#ifdef CONFIG_X86_SGX +# define DISABLE_SGX 0 +#else +# define DISABLE_SGX (1 << (X86_FEATURE_SGX & 31)) +#endif + /* * Make sure to add features to the correct mask */ @@ -74,7 +80,7 @@ #define DISABLED_MASK6 0 #define DISABLED_MASK7 (DISABLE_PTI) #define DISABLED_MASK8 0 -#define DISABLED_MASK9 (DISABLE_SMAP) +#define DISABLED_MASK9 (DISABLE_SMAP|DISABLE_SGX) #define DISABLED_MASK10 0 #define DISABLED_MASK11 0 #define DISABLED_MASK12 0 |