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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2016-06-14 20:29:45 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2016-06-15 10:10:49 +0200 |
| commit | 5823d0893ec284f37902e2ecd332dbb396a143d1 (patch) | |
| tree | 34c7bce671c38381612f3899adfae2863160822f /arch/x86/include/asm/intel-mid.h | |
| parent | x86/platform/atom/punit: Enable support for Merrifield (diff) | |
| download | linux-5823d0893ec284f37902e2ecd332dbb396a143d1.tar.xz linux-5823d0893ec284f37902e2ecd332dbb396a143d1.zip | |
x86/platform/intel-mid: Add Power Management Unit driver
Add Power Management Unit driver to handle power states of South Complex
devices on Intel Tangier. In the future it might be expanded to cover North
Complex devices as well.
With this driver the power state of the host controllers such as SPI, I2C,
UART, eMMC, and DMA would be managed.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: David Cohen <david.a.cohen@linux.intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-pci@vger.kernel.org
Link: http://lkml.kernel.org/r/1465928985-12113-1-git-send-email-andriy.shevchenko@linux.intel.com
[ Minor readability edits. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/include/asm/intel-mid.h')
| -rw-r--r-- | arch/x86/include/asm/intel-mid.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/include/asm/intel-mid.h b/arch/x86/include/asm/intel-mid.h index 7c5af123bdbd..38498a4fb44f 100644 --- a/arch/x86/include/asm/intel-mid.h +++ b/arch/x86/include/asm/intel-mid.h @@ -12,9 +12,17 @@ #define _ASM_X86_INTEL_MID_H #include <linux/sfi.h> +#include <linux/pci.h> #include <linux/platform_device.h> extern int intel_mid_pci_init(void); +extern int intel_mid_pci_set_power_state(struct pci_dev *pdev, pci_power_t state); + +#define INTEL_MID_PWR_LSS_OFFSET 4 +#define INTEL_MID_PWR_LSS_TYPE (1 << 7) + +extern int intel_mid_pwr_get_lss_id(struct pci_dev *pdev); + extern int get_gpio_by_name(const char *name); extern void intel_scu_device_register(struct platform_device *pdev); extern int __init sfi_parse_mrtc(struct sfi_table_header *table); |