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authorAravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>2015-05-06 13:58:56 +0200
committerBorislav Petkov <bp@suse.de>2015-05-07 10:23:32 +0200
commit24fd78a81f6d3fe7f7a440c8629f9c52cd5f830e (patch)
tree9c32cc0f0aa92425ebf780a9d93e3517b2f36ea7 /arch/x86/include/asm/mce.h
parentx86/mce: Add support for deferred errors on AMD (diff)
downloadlinux-24fd78a81f6d3fe7f7a440c8629f9c52cd5f830e.tar.xz
linux-24fd78a81f6d3fe7f7a440c8629f9c52cd5f830e.zip
x86/mce/amd: Introduce deferred error interrupt handler
Deferred errors indicate error conditions that were not corrected, but require no action from S/W (or action is optional).These errors provide info about a latent UC MCE that can occur when a poisoned data is consumed by the processor. Processors that report these errors can be configured to generate APIC interrupts to notify OS about the error. Provide an interrupt handler in this patch so that OS can catch these errors as and when they happen. Currently, we simply log the errors and exit the handler as S/W action is not mandated. Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Cc: Tony Luck <tony.luck@intel.com> Cc: x86-ml <x86@kernel.org> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1430913538-1415-5-git-send-email-Aravind.Gopalakrishnan@amd.com Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'arch/x86/include/asm/mce.h')
-rw-r--r--arch/x86/include/asm/mce.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 407ced642ac1..6a3034a0a072 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -234,6 +234,9 @@ void do_machine_check(struct pt_regs *, long);
extern void (*mce_threshold_vector)(void);
extern void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
+/* Deferred error interrupt handler */
+extern void (*deferred_error_int_vector)(void);
+
/*
* Thermal handler
*/