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authorBorislav Petkov <bp@suse.de>2017-01-20 21:29:42 +0100
committerThomas Gleixner <tglx@linutronix.de>2017-01-23 10:02:45 +0100
commit0c12d18ab96e4da9f3e963bc242689bdeaaf2330 (patch)
tree8f9f4df441f2f55952be27e577b4139243354a96 /arch/x86/include/asm/microcode.h
parentx86/MSR: Carve out bare minimum accessors (diff)
downloadlinux-0c12d18ab96e4da9f3e963bc242689bdeaaf2330.tar.xz
linux-0c12d18ab96e4da9f3e963bc242689bdeaaf2330.zip
x86/microcode: Convert to bare minimum MSR accessors
Having tracepoints to the MSR accessors makes them unsuitable for early microcode loading: think 32-bit before paging is enabled and us chasing pointers to test whether a tracepoint is enabled or not. Results in a reliable triple fault. Convert to the bare ones. Signed-off-by: Borislav Petkov <bp@suse.de> Link: http://lkml.kernel.org/r/20170120202955.4091-4-bp@alien8.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include/asm/microcode.h')
-rw-r--r--arch/x86/include/asm/microcode.h9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 38711df3bcb5..90b22bbdfce9 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -7,18 +7,17 @@
#define native_rdmsr(msr, val1, val2) \
do { \
- u64 __val = native_read_msr((msr)); \
+ u64 __val = __rdmsr((msr)); \
(void)((val1) = (u32)__val); \
(void)((val2) = (u32)(__val >> 32)); \
} while (0)
#define native_wrmsr(msr, low, high) \
- native_write_msr(msr, low, high)
+ __wrmsr(msr, low, high)
#define native_wrmsrl(msr, val) \
- native_write_msr((msr), \
- (u32)((u64)(val)), \
- (u32)((u64)(val) >> 32))
+ __wrmsr((msr), (u32)((u64)(val)), \
+ (u32)((u64)(val) >> 32))
struct ucode_patch {
struct list_head plist;