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authorIngo Molnar <mingo@elte.hu>2008-11-08 16:19:55 +0100
committerIngo Molnar <mingo@elte.hu>2008-11-08 16:48:19 +0100
commit0d12cdd5f883f508d33b85c1bae98fa28987c8c7 (patch)
treee07bb1f9ef49062fbd9817fe41cab66964bedf03 /arch/x86/include/asm/msr.h
parentsched: fine-tune SD_SIBLING_INIT (diff)
downloadlinux-0d12cdd5f883f508d33b85c1bae98fa28987c8c7.tar.xz
linux-0d12cdd5f883f508d33b85c1bae98fa28987c8c7.zip
sched: improve sched_clock() performance
in scheduler-intense workloads native_read_tsc() overhead accounts for 20% of the system overhead: 659567 system_call 41222.9375 686796 schedule 435.7843 718382 __switch_to 665.1685 823875 switch_mm 4526.7857 1883122 native_read_tsc 55385.9412 9761990 total 2.8468 this is large part due to the rdtsc_barrier() that is done before and after reading the TSC. But sched_clock() is not a precise clock in the GTOD sense, using such barriers is completely pointless. So remove the barriers and only use them in vget_cycles(). This improves lat_ctx performance by about 5%. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm/msr.h')
-rw-r--r--arch/x86/include/asm/msr.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 46be2fa7ac26..c2a812ebde89 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -108,9 +108,7 @@ static __always_inline unsigned long long __native_read_tsc(void)
{
DECLARE_ARGS(val, low, high);
- rdtsc_barrier();
asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
- rdtsc_barrier();
return EAX_EDX_VAL(val, low, high);
}