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authorFenghua Yu <fenghua.yu@intel.com>2010-07-30 02:13:42 +0200
committerH. Peter Anvin <hpa@linux.intel.com>2010-07-31 01:15:32 +0200
commit9792db6174d9927700ed288e6d74b9391bf785d1 (patch)
tree2a77654e13de14ec945abb38b5e19f2699bea0be /arch/x86/include/asm/serial.h
parentx86, cpu: Export AMD errata definitions (diff)
downloadlinux-9792db6174d9927700ed288e6d74b9391bf785d1.tar.xz
linux-9792db6174d9927700ed288e6d74b9391bf785d1.zip
x86, cpu: Package Level Thermal Control, Power Limit Notification definitions
Add package level thermal and power limit feature support. The two MSRs and features are new starting with Intel's Sandy Bridge processor. Please check Intel 64 and IA-32 Architectures SDMV Vol 3A 14.5.6 Power Limit Notification and 14.6 Package Level Thermal Management. This patch also fixes a bug which defines reverse THERM_INT_LOW_ENABLE bit and THERM_INT_HIGH_ENABLE bit. [ hpa: fixed up against current tip:x86/cpu ] Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> LKML-Reference: <1280448826-12004-2-git-send-email-fenghua.yu@intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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