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author | Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> | 2017-07-06 22:50:47 +0200 |
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committer | Radim Krčmář <rkrcmar@redhat.com> | 2017-07-12 22:38:30 +0200 |
commit | 89c8a4984fc98e625517bfe5083342d77ee35811 (patch) | |
tree | e8a974ab962400b2a851baed04a3b750f66f3ca0 /arch/x86/include/asm/svm.h | |
parent | KVM: SVM: Add Virtual VMLOAD VMSAVE feature definition (diff) | |
download | linux-89c8a4984fc98e625517bfe5083342d77ee35811.tar.xz linux-89c8a4984fc98e625517bfe5083342d77ee35811.zip |
KVM: SVM: Enable Virtual VMLOAD VMSAVE feature
Enable the Virtual VMLOAD VMSAVE feature. This is done by setting bit 1
at position B8h in the vmcb.
The processor must have nested paging enabled, be in 64-bit mode and
have support for the Virtual VMLOAD VMSAVE feature for the bit to be set
in the vmcb.
Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
Diffstat (limited to 'arch/x86/include/asm/svm.h')
-rw-r--r-- | arch/x86/include/asm/svm.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h index 74d139352491..58fffe79e417 100644 --- a/arch/x86/include/asm/svm.h +++ b/arch/x86/include/asm/svm.h @@ -120,6 +120,7 @@ struct __attribute__ ((__packed__)) vmcb_control_area { #define AVIC_ENABLE_MASK (1 << AVIC_ENABLE_SHIFT) #define LBR_CTL_ENABLE_MASK BIT_ULL(0) +#define VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK BIT_ULL(1) #define SVM_INTERRUPT_SHADOW_MASK 1 |