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authorLinus Torvalds <torvalds@linux-foundation.org>2017-12-31 22:03:05 +0100
committerLinus Torvalds <torvalds@linux-foundation.org>2017-12-31 22:03:05 +0100
commit52c90f2d32bfa7d6eccd66a56c44ace1f78fbadd (patch)
treeb6e54081e8da0b050bd06cf51a311f6e11bd0c0a /arch/x86/include/asm/tlbflush.h
parentMerge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/... (diff)
parentx86/ldt: Make LDT pgtable free conditional (diff)
downloadlinux-52c90f2d32bfa7d6eccd66a56c44ace1f78fbadd.tar.xz
linux-52c90f2d32bfa7d6eccd66a56c44ace1f78fbadd.zip
Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 page table isolation fixes from Thomas Gleixner: "Four patches addressing the PTI fallout as discussed and debugged yesterday: - Remove stale and pointless TLB flush invocations from the hotplug code - Remove stale preempt_disable/enable from __native_flush_tlb() - Plug the memory leak in the write_ldt() error path" * 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/ldt: Make LDT pgtable free conditional x86/ldt: Plug memory leak in error path x86/mm: Remove preempt_disable/enable() from __native_flush_tlb() x86/smpboot: Remove stale TLB flush invocations
Diffstat (limited to 'arch/x86/include/asm/tlbflush.h')
-rw-r--r--arch/x86/include/asm/tlbflush.h14
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index f68f9c836cca..4a08dd2ab32a 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -348,15 +348,17 @@ static inline void invalidate_user_asid(u16 asid)
*/
static inline void __native_flush_tlb(void)
{
- invalidate_user_asid(this_cpu_read(cpu_tlbstate.loaded_mm_asid));
/*
- * If current->mm == NULL then we borrow a mm which may change
- * during a task switch and therefore we must not be preempted
- * while we write CR3 back:
+ * Preemption or interrupts must be disabled to protect the access
+ * to the per CPU variable and to prevent being preempted between
+ * read_cr3() and write_cr3().
*/
- preempt_disable();
+ WARN_ON_ONCE(preemptible());
+
+ invalidate_user_asid(this_cpu_read(cpu_tlbstate.loaded_mm_asid));
+
+ /* If current->mm == NULL then the read_cr3() "borrows" an mm */
native_write_cr3(__native_read_cr3());
- preempt_enable();
}
/*