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| author | Paolo Bonzini <pbonzini@redhat.com> | 2022-02-05 06:58:25 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-02-05 06:58:25 +0100 |
| commit | 7e6a6b400db8048bd1c06e497e338388413cf5bc (patch) | |
| tree | 794f9fcdc7a1bfb9a2812e90fc76809d810203b2 /arch/x86/include/asm/tlbflush.h | |
| parent | KVM: x86: Use ERR_PTR_USR() to return -EFAULT as a __user pointer (diff) | |
| parent | KVM: arm64: Workaround Cortex-A510's single-step and PAC trap errata (diff) | |
| download | linux-7e6a6b400db8048bd1c06e497e338388413cf5bc.tar.xz linux-7e6a6b400db8048bd1c06e497e338388413cf5bc.zip | |
Merge tag 'kvmarm-fixes-5.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 fixes for 5.17, take #2
- A couple of fixes when handling an exception while a SError has been
delivered
- Workaround for Cortex-A510's single-step[ erratum
Diffstat (limited to 'arch/x86/include/asm/tlbflush.h')
| -rw-r--r-- | arch/x86/include/asm/tlbflush.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index b587a9ee9cb2..98fa0a114074 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -261,4 +261,9 @@ extern void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch); #endif /* !MODULE */ +static inline void __native_tlb_flush_global(unsigned long cr4) +{ + native_write_cr4(cr4 ^ X86_CR4_PGE); + native_write_cr4(cr4); +} #endif /* _ASM_X86_TLBFLUSH_H */ |