diff options
| author | Junaid Shahid <junaids@google.com> | 2016-12-07 01:46:15 +0100 |
|---|---|---|
| committer | Radim Krčmář <rkrcmar@redhat.com> | 2017-01-09 14:46:10 +0100 |
| commit | 37f0e8fe6b10ee2ab52576caa721ee1282de74a6 (patch) | |
| tree | 586978d589093bfb1bbd2200f64b3e51d1c66402 /arch/x86/include/asm/vmx.h | |
| parent | kvm: x86: mmu: Introduce a no-tracking version of mmu_spte_update (diff) | |
| download | linux-37f0e8fe6b10ee2ab52576caa721ee1282de74a6.tar.xz linux-37f0e8fe6b10ee2ab52576caa721ee1282de74a6.zip | |
kvm: x86: mmu: Do not use bit 63 for tracking special SPTEs
MMIO SPTEs currently set both bits 62 and 63 to distinguish them as special
PTEs. However, bit 63 is used as the SVE bit in Intel EPT PTEs. The SVE bit
is ignored for misconfigured PTEs but not necessarily for not-Present PTEs.
Since MMIO SPTEs use an EPT misconfiguration, so using bit 63 for them is
acceptable. However, the upcoming fast access tracking feature adds another
type of special tracking PTE, which uses not-Present PTEs and hence should
not set bit 63.
In order to use common bits to distinguish both type of special PTEs, we
now use only bit 62 as the special bit.
Signed-off-by: Junaid Shahid <junaids@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/include/asm/vmx.h')
| -rw-r--r-- | arch/x86/include/asm/vmx.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h index 25a482fb5241..fc061cbb46e0 100644 --- a/arch/x86/include/asm/vmx.h +++ b/arch/x86/include/asm/vmx.h @@ -467,8 +467,13 @@ enum vmcs_field { #define VMX_EPT_WRITABLE_MASK 0x2ull #define VMX_EPT_EXECUTABLE_MASK 0x4ull #define VMX_EPT_IPAT_BIT (1ull << 6) -#define VMX_EPT_ACCESS_BIT (1ull << 8) -#define VMX_EPT_DIRTY_BIT (1ull << 9) +#define VMX_EPT_ACCESS_BIT (1ull << 8) +#define VMX_EPT_DIRTY_BIT (1ull << 9) + +/* The mask to use to trigger an EPT Misconfiguration in order to track MMIO */ +#define VMX_EPT_MISCONFIG_WX_VALUE (VMX_EPT_WRITABLE_MASK | \ + VMX_EPT_EXECUTABLE_MASK) + #define VMX_EPT_IDENTITY_PAGETABLE_ADDR 0xfffbc000ul |