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authorEric Auger <eric.auger@redhat.com>2019-11-08 16:58:03 +0100
committerJoerg Roedel <jroedel@suse.de>2019-11-11 16:10:54 +0100
commit4e7120d79edb31e4ee68e6f8421448e4603be1e9 (patch)
tree7cd7508a4e2f64c5d8550806d4f0e21b2baf7792 /arch/x86/include
parentMAINTAINERS: Update for INTEL IOMMU (VT-d) entry (diff)
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iommu/vt-d: Fix QI_DEV_IOTLB_PFSID and QI_DEV_EIOTLB_PFSID macros
For both PASID-based-Device-TLB Invalidate Descriptor and Device-TLB Invalidate Descriptor, the Physical Function Source-ID value is split according to this layout: PFSID[3:0] is set at offset 12 and PFSID[15:4] is put at offset 52. Fix the part laid out at offset 52. Fixes: 0f725561e1684 ("iommu/vt-d: Add definitions for PFSID") Signed-off-by: Eric Auger <eric.auger@redhat.com> Acked-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: stable@vger.kernel.org # v4.19+ Acked-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'arch/x86/include')
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