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authorSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>2019-11-14 21:15:10 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2020-02-05 15:17:42 +0100
commitef8efd7a15bb7147a4ffb09758a6bd25d744a14e (patch)
tree9e878b0f2abafeb446688ce1c7a844b2ea0d1795 /arch/x86/include
parentKVM: svm: avic: Add support for dynamic setup/teardown of virtual APIC backin... (diff)
downloadlinux-ef8efd7a15bb7147a4ffb09758a6bd25d744a14e.tar.xz
linux-ef8efd7a15bb7147a4ffb09758a6bd25d744a14e.zip
kvm: x86: Introduce APICv x86 ops for checking APIC inhibit reasons
Inibit reason bits are used to determine if APICv deactivation is applicable for a particular hardware virtualization architecture. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/kvm_host.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 0189687877a7..81c41bfb0a5f 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -1123,6 +1123,7 @@ struct kvm_x86_ops {
void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
void (*enable_irq_window)(struct kvm_vcpu *vcpu);
void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
+ bool (*check_apicv_inhibit_reasons)(ulong bit);
void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);