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authorBjorn Helgaas <bhelgaas@google.com>2014-03-11 21:23:12 +0100
committerBjorn Helgaas <bhelgaas@google.com>2014-03-12 18:19:20 +0100
commitac93ac7403493f8707b7734de9f40d5cb5db9045 (patch)
treea75cae106cf2b399d18b72bc05856d0e3cc6aa48 /arch/x86/kernel/aperture_64.c
parentPCI: Enable INTx in pci_reenable_device() only when MSI/MSI-X not enabled (diff)
downloadlinux-ac93ac7403493f8707b7734de9f40d5cb5db9045.tar.xz
linux-ac93ac7403493f8707b7734de9f40d5cb5db9045.zip
PCI: Don't check resource_size() in pci_bus_alloc_resource()
Paul reported that after f75b99d5a77d ("PCI: Enforce bus address limits in resource allocation") on a 32-bit kernel (CONFIG_PHYS_ADDR_T_64BIT not set), intel-gtt complained "can't ioremap flush page - no chipset flushing". In addition, other PCI resource allocations, e.g., for bridge windows, failed. This happens because we incorrectly skip bus resources of [mem 0x00000000-0xffffffff] because we think they are of size zero. When resource_size_t is 32 bits wide, resource_size() on [mem 0x00000000-0xffffffff] returns 0 because (r->end - r->start + 1) overflows. Therefore, we can't use "resource_size() == 0" to decide that allocation from this resource will fail. allocate_resource() should fail anyway if it can't satisfy the address constraints, so we should just depend on that. A [mem 0x00000000-0xffffffff] bus resource is obviously not really valid, but we do fall back to it as a default when we don't have information about host bridge apertures. Link: https://bugzilla.kernel.org/show_bug.cgi?id=71611 Fixes: f75b99d5a77d PCI: Enforce bus address limits in resource allocation Reported-and-tested-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'arch/x86/kernel/aperture_64.c')
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