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authorIngo Molnar <mingo@elte.hu>2008-12-03 10:39:53 +0100
committerIngo Molnar <mingo@elte.hu>2008-12-08 15:47:15 +0100
commit241771ef016b5c0c83cd7a4372a74321c973c1e6 (patch)
tree5893d72f1721af34daee82f27449bd35c9f65363 /arch/x86/kernel/apic.c
parentperformance counters: documentation (diff)
downloadlinux-241771ef016b5c0c83cd7a4372a74321c973c1e6.tar.xz
linux-241771ef016b5c0c83cd7a4372a74321c973c1e6.zip
performance counters: x86 support
Implement performance counters for x86 Intel CPUs. It's simplified right now: the PERFMON CPU feature is assumed, which is available in Core2 and later Intel CPUs. The design is flexible to be extended to more CPU types as well. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/apic.c')
-rw-r--r--arch/x86/kernel/apic.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c
index 16f94879b525..8ab8c1858672 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic.c
@@ -31,6 +31,7 @@
#include <linux/dmi.h>
#include <linux/dmar.h>
+#include <asm/intel_arch_perfmon.h>
#include <asm/atomic.h>
#include <asm/smp.h>
#include <asm/mtrr.h>
@@ -1147,6 +1148,7 @@ void __cpuinit setup_local_APIC(void)
apic_write(APIC_ESR, 0);
}
#endif
+ perf_counters_lapic_init(0);
preempt_disable();