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author | Fernando Luis Vázquez Cao <fernando@oss.ntt.co.jp> | 2011-12-13 03:51:53 +0100 |
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committer | Ingo Molnar <mingo@elte.hu> | 2011-12-14 09:32:05 +0100 |
commit | 346b46be5f10e4d247160ea94ac34450be60ce1e (patch) | |
tree | e7515a97d2f0da032c8e1d1371aa94e866c50065 /arch/x86/kernel/apic | |
parent | pci, x86/io-apic: Allow PCI_IOAPIC to be user configurable on x86 (diff) | |
download | linux-346b46be5f10e4d247160ea94ac34450be60ce1e.tar.xz linux-346b46be5f10e4d247160ea94ac34450be60ce1e.zip |
x86: Add per-cpu stat counter for APIC ICR read tries
In the IPI delivery slow path (NMI delivery) we retry the ICR
read to check for delivery completion a limited number of times.
[ The reason for the limited retries is that some of the places
where it is used (cpu boot, kdump, etc) IPI delivery might not
succeed (due to a firmware bug or system crash, for example)
and in such a case it is better to give up and resume
execution of other code. ]
This patch adds a new entry to /proc/interrupts, RTR, which
tells user space the number of times we retried the ICR read in
the IPI delivery slow path.
This should give some insight into how well the APIC
message delivery hardware is working - if the counts are way
too large then we are hitting a (very-) slow path way too
often.
Signed-off-by: Fernando Luis Vazquez Cao <fernando@oss.ntt.co.jp>
Cc: Jörn Engel <joern@logfs.org>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Link: http://lkml.kernel.org/n/tip-vzsp20lo2xdzh5f70g0eis2s@git.kernel.org
[ extended the changelog ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/apic')
-rw-r--r-- | arch/x86/kernel/apic/apic.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index f98d84caf94c..2942794a9a52 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -79,6 +79,11 @@ DEFINE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid, BAD_APICID); EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid); EXPORT_EARLY_PER_CPU_SYMBOL(x86_bios_cpu_apicid); +/* + * ICR read retry counter + */ +DEFINE_PER_CPU(unsigned, icr_read_retry_count); + #ifdef CONFIG_X86_32 /* @@ -250,6 +255,7 @@ u32 native_safe_apic_wait_icr_idle(void) send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY; if (!send_status) break; + percpu_inc(icr_read_retry_count); udelay(100); } while (timeout++ < 1000); |