diff options
author | Andi Kleen <ak@suse.de> | 2008-01-30 13:30:40 +0100 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 13:30:40 +0100 |
commit | 739f33b38bf88312447e38ae8b7ac3acdbb72a6b (patch) | |
tree | 2d5e09f00175f7078f519609c20624a8e77f0e5b /arch/x86/kernel/apic_64.c | |
parent | x86: use core id bits for apicid_to_node initialization (diff) | |
download | linux-739f33b38bf88312447e38ae8b7ac3acdbb72a6b.tar.xz linux-739f33b38bf88312447e38ae8b7ac3acdbb72a6b.zip |
x86: untable __init references between IO data
Earlier patch added IO APIC setup into local APIC setup. This caused
modpost warnings. Fix them by untangling setup_local_APIC() and splitting
it into smaller functions. The IO APIC initialization is only called
for the BP init.
Also removed some outdated debugging code and minor cleanup.
[ tglx: arch/x86 adaptation ]
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/apic_64.c')
-rw-r--r-- | arch/x86/kernel/apic_64.c | 46 |
1 files changed, 23 insertions, 23 deletions
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c index 994298bf4921..d341f798255c 100644 --- a/arch/x86/kernel/apic_64.c +++ b/arch/x86/kernel/apic_64.c @@ -677,7 +677,7 @@ void __init init_bsp_APIC(void) */ void __cpuinit setup_local_APIC(void) { - unsigned int value, maxlvt; + unsigned int value; int i, j; value = apic_read(APIC_LVR); @@ -773,32 +773,23 @@ void __cpuinit setup_local_APIC(void) else value = APIC_DM_NMI | APIC_LVT_MASKED; apic_write(APIC_LVT1, value); +} + +void __cpuinit lapic_setup_esr(void) +{ + unsigned maxlvt = lapic_get_maxlvt(); + apic_write(APIC_LVTERR, ERROR_APIC_VECTOR); /* - * Now enable IO-APICs, actually call clear_IO_APIC - * We need clear_IO_APIC before enabling vector on BP + * spec says clear errors after enabling vector. */ - if (!smp_processor_id() && !skip_ioapic_setup && nr_ioapics) - enable_IO_APIC(); - - { - unsigned oldvalue; - maxlvt = lapic_get_maxlvt(); - oldvalue = apic_read(APIC_ESR); - value = ERROR_APIC_VECTOR; // enables sending errors - apic_write(APIC_LVTERR, value); - /* - * spec says clear errors after enabling vector. - */ - if (maxlvt > 3) - apic_write(APIC_ESR, 0); - value = apic_read(APIC_ESR); - if (value != oldvalue) - apic_printk(APIC_VERBOSE, - "ESR value after enabling vector: %08x, after %08x\n", - oldvalue, value); - } + if (maxlvt > 3) + apic_write(APIC_ESR, 0); +} +void __cpuinit end_local_APIC_setup(void) +{ + lapic_setup_esr(); nmi_watchdog_default(); setup_apic_nmi_watchdog(NULL); apic_pm_activate(); @@ -879,6 +870,15 @@ int __init APIC_init_uniprocessor(void) setup_local_APIC(); + /* + * Now enable IO-APICs, actually call clear_IO_APIC + * We need clear_IO_APIC before enabling vector on BP + */ + if (!skip_ioapic_setup && nr_ioapics) + enable_IO_APIC(); + + end_local_APIC_setup(); + if (smp_found_config && !skip_ioapic_setup && nr_ioapics) setup_IO_APIC(); else |