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author | H. Peter Anvin <hpa@linux.intel.com> | 2009-01-23 01:17:05 +0100 |
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committer | H. Peter Anvin <hpa@linux.intel.com> | 2009-01-24 03:07:45 +0100 |
commit | 75a048119e76540d73132cfc8e0fa0c0a8bb6c83 (patch) | |
tree | 2a4d88809efae435e6fe8e33e630f92d76742c9d /arch/x86/kernel/cpu/intel.c | |
parent | x86: clean up stray space in <asm/processor.h> (diff) | |
download | linux-75a048119e76540d73132cfc8e0fa0c0a8bb6c83.tar.xz linux-75a048119e76540d73132cfc8e0fa0c0a8bb6c83.zip |
x86: handle PAT more like other CPU features
Impact: Cleanup
When PAT was originally introduced, it was handled specially for a few
reasons:
- PAT bugs are hard to track down, so we wanted to maintain a
whitelist of CPUs.
- The i386 and x86-64 CPUID code was not yet unified.
Both of these are now obsolete, so handle PAT like any other features,
including ordinary feature blacklisting due to known bugs.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86/kernel/cpu/intel.c')
-rw-r--r-- | arch/x86/kernel/cpu/intel.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 8ea6929e974c..20ce03acf04b 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -50,6 +50,18 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC); } + /* + * There is a known erratum on Pentium III and Core Solo + * and Core Duo CPUs. + * " Page with PAT set to WC while associated MTRR is UC + * may consolidate to UC " + * Because of this erratum, it is better to stick with + * setting WC in MTRR rather than using PAT on these CPUs. + * + * Enable PAT WC only on P4, Core 2 or later CPUs. + */ + if (c->x86 == 6 && c->x86_model < 15) + clear_cpu_cap(c, X86_FEATURE_PAT); } #ifdef CONFIG_X86_32 |