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authorH. Peter Anvin <hpa@zytor.com>2009-01-26 18:40:58 +0100
committerH. Peter Anvin <hpa@zytor.com>2009-01-26 18:40:58 +0100
commit30a0fb947a68ad3ab8a7184e3b3d79dce10e3688 (patch)
tree1c2d4059264b71b36d00dcc96c333a47e28ae18a /arch/x86/kernel/io_apic.c
parentxen: unitialised return value in xenbus_write_transaction (diff)
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x86: correct the CPUID pattern for MSR_IA32_MISC_ENABLE availability
Impact: re-enable CPUID unmasking on affected processors As far as I am capable of discerning from the documentation, MSR_IA32_MISC_ENABLE should be available for all family 0xf CPUs, as well as family 6 for model >= 0xd (newer Pentium M). The documentation on this isn't ideal, so we need to be on the lookout for errors, still. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/kernel/io_apic.c')
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