diff options
| author | Andreas Herrmann <andreas.herrmann3@amd.com> | 2008-12-16 19:20:21 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-12-16 19:58:06 +0100 |
| commit | 98415301ea2dd389539ab429bcfa9da07219eabc (patch) | |
| tree | 797e3cb0e8d86313aa1b1346da4e5129f3c27441 /arch/x86/kernel/microcode_amd.c | |
| parent | x86: microcode_amd: consolidate macro definitions (diff) | |
| download | linux-98415301ea2dd389539ab429bcfa9da07219eabc.tar.xz linux-98415301ea2dd389539ab429bcfa9da07219eabc.zip | |
x86: microcode_amd: remove (wrong) chipset deivce ID checks
Impact: remove dead/incorrect code
Currently there is no chipset specific ucode. The checks are incorrect
anyway (e.g. pci device IDs are 16 bit and not 8 bit).
Thus I remove the stuff for the time being and will reintroduce it if
it's foreseeable that it is really needed.
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/microcode_amd.c')
| -rw-r--r-- | arch/x86/kernel/microcode_amd.c | 32 |
1 files changed, 5 insertions, 27 deletions
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c index e68e723490a3..2e8af6ef3da9 100644 --- a/arch/x86/kernel/microcode_amd.c +++ b/arch/x86/kernel/microcode_amd.c @@ -108,7 +108,6 @@ static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig) static int get_matching_microcode(int cpu, void *mc, int rev) { struct microcode_header_amd *mc_header = mc; - struct pci_dev *nb_pci_dev, *sb_pci_dev; unsigned int current_cpu_id; unsigned int equiv_cpu_id = 0x00; unsigned int i = 0; @@ -137,32 +136,11 @@ static int get_matching_microcode(int cpu, void *mc, int rev) return 0; } - /* ucode may be northbridge specific */ - if (mc_header->nb_dev_id) { - nb_pci_dev = pci_get_device(PCI_VENDOR_ID_AMD, - (mc_header->nb_dev_id & 0xff), - NULL); - if ((!nb_pci_dev) || - (mc_header->nb_rev_id != nb_pci_dev->revision)) { - printk(KERN_ERR "microcode: CPU%d NB mismatch\n", cpu); - pci_dev_put(nb_pci_dev); - return 0; - } - pci_dev_put(nb_pci_dev); - } - - /* ucode may be southbridge specific */ - if (mc_header->sb_dev_id) { - sb_pci_dev = pci_get_device(PCI_VENDOR_ID_AMD, - (mc_header->sb_dev_id & 0xff), - NULL); - if ((!sb_pci_dev) || - (mc_header->sb_rev_id != sb_pci_dev->revision)) { - printk(KERN_ERR "microcode: CPU%d SB mismatch\n", cpu); - pci_dev_put(sb_pci_dev); - return 0; - } - pci_dev_put(sb_pci_dev); + /* ucode might be chipset specific -- currently we don't support this */ + if (mc_header->nb_dev_id || mc_header->sb_dev_id) { + printk(KERN_WARNING "microcode: CPU%d loading of chipset " + "specific code not yet supported\n", cpu); + return 0; } if (mc_header->patch_id <= rev) |