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authorGregory Fong <gregory.0xf0@gmail.com>2015-08-01 03:17:43 +0200
committerLinus Walleij <linus.walleij@linaro.org>2015-08-13 13:13:26 +0200
commit19a7b6940b781256ea8821e803d1e5f2933224b1 (patch)
tree95f1f9cf88a9828aeebf4f34ce5220ba88c1b8de /arch/x86/kernel/smpboot.c
parentgpio/ABI: document what is already the case (diff)
downloadlinux-19a7b6940b781256ea8821e803d1e5f2933224b1.tar.xz
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gpio: brcmstb: Add interrupt and wakeup source support
Uses the gpiolib irqchip helpers. For this to work, the irq setup function is called once per bank instead of once per device. Note that all known uses of this block have a BCM7120 L2 interrupt controller as a parent. Supports interrupts for all GPIOs. In the IRQ handler, we check for raised IRQs for invalid GPIOs and warn (ratelimited) if they're encountered. Also, several drivers (e.g. gpio-keys) allow for GPIOs to be configured as wakeup sources, and this GPIO controller supports that through a separate interrupt path. The de-facto standard DT property "wakeup-source" is checked, since that indicates whether the GPIO controller hardware can wake. Uses the IRQCHIP_MASK_ON_SUSPEND irq_chip flag because UPG GIO doesn't have any of its own wakeup source configuration. Aside regarding gpiolib irqchip helpers: It wasn't obvious (to me) that you can have multiple chained irqchips and associated IRQ domains for a single parent IRQ, and as long as the xlate function is written correctly, a GPIO IRQ request end up checking the correct domain and will get associated with the correct IRQ. What helps make this clear is to read drivers/gpio/gpiolib-of.c: - of_gpiochip_find_and_xlate() - of_get_named_gpiod_flags() drivers/gpio/gpiolib.c: - gpiochip_find() Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/x86/kernel/smpboot.c')
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