diff options
| author | H. Peter Anvin <hpa@linux.intel.com> | 2012-01-19 21:56:50 +0100 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2012-01-19 21:56:50 +0100 |
| commit | 282f445a779ed76fca9884fe377bf56a3088b208 (patch) | |
| tree | d9abcf526baee0100672851e0a8894c19e762a39 /arch/x86/kernel/tsc.c | |
| parent | x86, tsc: Fix SMI induced variation in quick_pit_calibrate() (diff) | |
| parent | uml: fix compile for x86-64 (diff) | |
| download | linux-282f445a779ed76fca9884fe377bf56a3088b208.tar.xz linux-282f445a779ed76fca9884fe377bf56a3088b208.zip | |
Merge remote-tracking branch 'linus/master' into x86/urgent
Diffstat (limited to 'arch/x86/kernel/tsc.c')
| -rw-r--r-- | arch/x86/kernel/tsc.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index f54694611172..a62c201c97ec 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -993,3 +993,23 @@ void __init tsc_init(void) check_system_tsc_reliable(); } +#ifdef CONFIG_SMP +/* + * If we have a constant TSC and are using the TSC for the delay loop, + * we can skip clock calibration if another cpu in the same socket has already + * been calibrated. This assumes that CONSTANT_TSC applies to all + * cpus in the socket - this should be a safe assumption. + */ +unsigned long __cpuinit calibrate_delay_is_known(void) +{ + int i, cpu = smp_processor_id(); + + if (!tsc_disabled && !cpu_has(&cpu_data(cpu), X86_FEATURE_CONSTANT_TSC)) + return 0; + + for_each_online_cpu(i) + if (cpu_data(i).phys_proc_id == cpu_data(cpu).phys_proc_id) + return cpu_data(i).loops_per_jiffy; + return 0; +} +#endif |