summaryrefslogtreecommitdiffstats
path: root/arch/x86/kernel/x86_init.c
diff options
context:
space:
mode:
authorDavid Woodhouse <dwmw@amazon.co.uk>2020-10-24 23:35:32 +0200
committerThomas Gleixner <tglx@linutronix.de>2020-10-28 20:26:29 +0100
commitab0f59c6f135289c7ea90b0e2471674bf289d884 (patch)
treeda6ae53692af175c9993ff0f372ba543f6af468a /arch/x86/kernel/x86_init.c
parentx86/ioapic: Handle Extended Destination ID field in RTE (diff)
downloadlinux-ab0f59c6f135289c7ea90b0e2471674bf289d884.tar.xz
linux-ab0f59c6f135289c7ea90b0e2471674bf289d884.zip
x86/apic: Support 15 bits of APIC ID in MSI where available
Some hypervisors can allow the guest to use the Extended Destination ID field in the MSI address to address up to 32768 CPUs. This applies to all downstream devices which generate MSI cycles, including HPET, I/O-APIC and PCI MSI. HPET and PCI MSI use the same __irq_msi_compose_msg() function, while I/O-APIC generates its own and had support for the extended bits added in a previous commit. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20201024213535.443185-33-dwmw2@infradead.org
Diffstat (limited to 'arch/x86/kernel/x86_init.c')
-rw-r--r--arch/x86/kernel/x86_init.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index a3038d8deb6a..8b395821cb8d 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -110,6 +110,7 @@ struct x86_init_ops x86_init __initdata = {
.init_platform = x86_init_noop,
.guest_late_init = x86_init_noop,
.x2apic_available = bool_x86_init_noop,
+ .msi_ext_dest_id = bool_x86_init_noop,
.init_mem_mapping = x86_init_noop,
.init_after_bootmem = x86_init_noop,
},