diff options
author | Sean Christopherson <seanjc@google.com> | 2023-01-07 02:10:22 +0100 |
---|---|---|
committer | Sean Christopherson <seanjc@google.com> | 2023-01-24 19:04:35 +0100 |
commit | b223649576fc21bec46260805c2cd70e1cb3b8e8 (patch) | |
tree | 85aeaf63c677fa8feaf03e8ac864a57d37b15f09 /arch/x86/kvm/lapic.c | |
parent | KVM: x86: Inject #GP on x2APIC WRMSR that sets reserved bits 63:32 (diff) | |
download | linux-b223649576fc21bec46260805c2cd70e1cb3b8e8.tar.xz linux-b223649576fc21bec46260805c2cd70e1cb3b8e8.zip |
KVM: x86: Mark x2APIC DFR reg as non-existent for x2APIC
Mark APIC_DFR as being invalid/non-existent in x2APIC mode instead of
handling it as a one-off check in kvm_x2apic_msr_read(). This will allow
reusing "valid_reg_mask" to generate VMX's interception bitmaps for
x2APIC. Handling DFR in the common read path may also fix the Hyper-V
PV MSR interface, if that can coexist with x2APIC.
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Link: https://lore.kernel.org/r/20230107011025.565472-4-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Diffstat (limited to 'arch/x86/kvm/lapic.c')
-rw-r--r-- | arch/x86/kvm/lapic.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 814b65106057..91e6f958d4b2 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1573,7 +1573,6 @@ static int kvm_lapic_reg_read(struct kvm_lapic *apic, u32 offset, int len, APIC_REG_MASK(APIC_TASKPRI) | APIC_REG_MASK(APIC_PROCPRI) | APIC_REG_MASK(APIC_LDR) | - APIC_REG_MASK(APIC_DFR) | APIC_REG_MASK(APIC_SPIV) | APIC_REGS_MASK(APIC_ISR, APIC_ISR_NR) | APIC_REGS_MASK(APIC_TMR, APIC_ISR_NR) | @@ -1594,12 +1593,13 @@ static int kvm_lapic_reg_read(struct kvm_lapic *apic, u32 offset, int len, valid_reg_mask |= APIC_REG_MASK(APIC_LVTCMCI); /* - * ARBPRI and ICR2 are not valid in x2APIC mode. WARN if KVM reads ICR - * in x2APIC mode as it's an 8-byte register in x2APIC and needs to be - * manually handled by the caller. + * ARBPRI, DFR, and ICR2 are not valid in x2APIC mode. WARN if KVM + * reads ICR in x2APIC mode as it's an 8-byte register in x2APIC and + * needs to be manually handled by the caller. */ if (!apic_x2apic_mode(apic)) valid_reg_mask |= APIC_REG_MASK(APIC_ARBPRI) | + APIC_REG_MASK(APIC_DFR) | APIC_REG_MASK(APIC_ICR2); else WARN_ON_ONCE(offset == APIC_ICR); @@ -3147,9 +3147,6 @@ int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data) if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(apic)) return 1; - if (reg == APIC_DFR) - return 1; - return kvm_lapic_msr_read(apic, reg, data); } |